1. Field of the Invention
This technology relates to a page buffer.
2. Description of Related Art
Memory cells in a typical memory array can be accessed by thousands of bit lines, and in turn by thousands of page buffer circuits.
An example page buffer circuit design includes at least two latches. A first latch stores different data over the different phases of a multi-phase program operation. During one of the phases of the program operation, the results of a prior multi-phase program operation are required. However, because of the often changing data in the first latch, the first latch by itself does not store the results of a prior multi-phase program operation.
A second latch in the page buffer circuit stores the results of a prior multi-phase program operation in a location readily accessible within each page buffer circuit. The overall area of the integrated circuit is increased by the multiple latches of each page buffer circuit. An example page buffer circuit design discussed above is disclosed in FIGS. 1 and 2.